In this article we elaborate on reality considerations when deploying wireless sensor networks with strict end-to-end delay requirement. Our improvements are particularly important for a design and implementation of strict real-time systems while at the same time we decrease overall power consumption. Firstly, we design and implement application tailored TDMA-FDMA medium access protocol with guaranteed end-to-end delay. Secondly, we integrate in the implementation of the protocol the bootstrapping mechanism and thirdly, the time synchronization mechanism. Next, we show that by combining medium access protocol, bootstrapping, and time synchronization mechanisms within the link-layer, we can limit on average clock drift in the network to 0.5 micro seconds, as well as achieve 81 % energy efficiency while keeping collision probability at its minimum of 1 %. Finally, we conclude with challenges and lessons learned in real-world deployment of TDMA/FDMA based link-layer with guaranteed end-to-end delay in wireless sensor networks.

We study the problem of automatic generation of smooth and obstacle-avoiding planar paths for efficient guidance of autonomous mining vehicles. Fast traversal of a path is of special interest. We consider four-wheel four-gear articulated vehicles and assume that we have an a priori knowledge of the mine wall environment in the form of polygonal chains. Computing quartic uniform B-spline curves, minimizing curvature variation, staying at least at a proposed safety margin distance from the mine walls, we plan high speed paths.

In this paper we study the Prefix Sum problem introduced by Fredman. We show that it is possible to perform both update and retrieval in O(1) time simultaneously under a memory model in which individual bits may be shared by several words. We also show that two variants (generalizations) of the problem can be solved optimally in Θ(lgN) time under the comparison based model of computation.

In this paper we study the problem of computing w-bit bitwise operations using only O(1) memory probes. We show that under the RAM model there exists a Omega(2^w) space lower bound while under the RAMBO model this space bound goes down to O(w) bits. We present algorithms that use four different RAMBO memory topologies to perform bitwise boolean operations and shift operations.

Interoperability is often seen only as a technological problem related to reusability. We would like to give interoperability a new role in the structure of the learning environment and in collaborative activities. For us interoperability is also connected with didactical, semiotic and cultural aspects. It improves the interaction between the materials produced with different tools, the construction of kaleidoscopic artifacts and the refl ection on the learning process.

We present a new data structure of size 3M bits, where M is the size of the universe at hand, for realizing a discrete priority queue. When this data structure is used in combination with a new memory topology it executes all discrete priority queue operations in O(1) worst case time. In doing so we demonstrate how an unconventional, but practically implementable, memory architecture can be employed to sidestep known lower bounds and achieve constant time performance.

We discuss a problem of handling resource reservations. The resource can be reserved for some time, it can be freed or it can be queried what is the largest amount of reserved resource during a time interval. We show that the problem has a lower bound of $\Omega(\log n)$ per operation on average and we give a matching upper bound algorithm. Our solution also solves a dynamic version of the related problems of a prefix sum and a partial sum.