This is a master thesis work for SwitchCore AB concerning the design of a network processor for their Gigabit Ethernet switch architecture. Keeping the size down is crucial in order to fit it onto the chip. The result is a small network processor capable of handling Gigabit Ethernet that can be integrated into the architecture. To verify the network processor, a program enabling IPv6 via virtual routing ports was developed. This shows how beneficial a network processor would be when implementing new features.