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Analyzing Design Parameters of Nano-Magnetic Technology Based Converter Circuit
Department of Electronics and Telecommunication, Veer Surendra Sai, University of Technology, Burla, India.
Department of Electronics and Communication Engineering, Bharat Institute of Engineering and Technology, Hyderabad, India.
Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.ORCID-id: 0000-0002-6055-3198
Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.ORCID-id: 0000-0001-8774-9433
2019 (engelsk)Inngår i: VLSI Design and Test: 23rd International Symposium, VDAT 2019, Indore, India, July 4–6, 2019, Revised Selected Papers / [ed] Dr. Anirban Sengupta, Dr. Sudeb Dasgupta, Virendra Singh, Rohit Sharma, Santosh Kumar Vishvakarma, Springer, 2019, s. 34-46Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

Digital circuits need improvement in computation speed, reducing circuit complexity and power consumption. Emerging Technology NML can be such an architecture at nano-scale and thus emerges as a viable alternative for the digital CMOS VLSI. This technology has the capability to compute the logic as well as storage into the same device, which points out that it great potential for emerging technology. Since Nano-magnetic, technology fast approaches its minimal feature size, high device density and operate at room temperature. NML based circuits synthesis has to opt for novel half subtraction and Binary-to-Gray architecture for achieving minimal complexity and high-speed performance. This manuscript pro-poses area efficient binary half-subtraction and Binary-to-Gray converter architecture. Circuits’ synthesize are performed by MagCAD tool and simulate by Modelsim simulator. The circuit’s performance are estimated over other existing designs. The proposed converter consume 73.73%, and 94.49% less area than the converter designed using QCA and CMOS technique respectively. This is a significant contribution to this paper. Simulation results of converter show that the critical path delay falls within 0.15 µs.

sted, utgiver, år, opplag, sider
Springer, 2019. s. 34-46
Emneord [en]
Nano-magnetic logic, Binary-to-gray converter, Magnetic anisotropy, Minority voter, Perpendicular nano-magnetic logic
HSV kategori
Forskningsprogram
Elektroniksystem
Identifikatorer
URN: urn:nbn:se:ltu:diva-75976DOI: 10.1007/978-981-32-9767-8_4Scopus ID: 2-s2.0-85077114500ISBN: 978-981-329-766-1 (tryckt)OAI: oai:DiVA.org:ltu-75976DiVA, id: diva2:1350931
Konferanse
23rd International Symposium, VDAT 2019, Indore, India, July 4–6, 2019
Tilgjengelig fra: 2019-09-12 Laget: 2019-09-12 Sist oppdatert: 2022-11-02bibliografisk kontrollert

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Chouhan, Shailesh SinghAcharya, Sarthak

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