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Network processor core architecture
2002 (English)Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

This is a master thesis work for SwitchCore AB concerning the design of a network processor for their Gigabit Ethernet switch architecture. Keeping the size down is crucial in order to fit it onto the chip. The result is a small network processor capable of handling Gigabit Ethernet that can be integrated into the architecture. To verify the network processor, a program enabling IPv6 via virtual routing ports was developed. This shows how beneficial a network processor would be when implementing new features.

Place, publisher, year, edition, pages
2002.
Keyword [en]
Technology
Keyword [sv]
Teknik
Identifiers
URN: urn:nbn:se:ltu:diva-46900ISRN: LTU-EX--02/092--SELocal ID: 48184325-b9d1-4062-abd6-59efc282a38eOAI: oai:DiVA.org:ltu-46900DiVA: diva2:1020216
Subject / course
Student thesis, at least 30 credits
Educational program
Computer Science and Engineering, master's level
Examiners
Note
Validerat; 20101217 (root)Available from: 2016-10-04 Created: 2016-10-04Bibliographically approved

Open Access in DiVA

fulltext(678 kB)17 downloads
File information
File name FULLTEXT01.pdfFile size 678 kBChecksum SHA-512
5741be9ae344aad0387bf3599d1b4b5a894d10c687435cda1ddcb1b56d3898314cd391e7756691982477e97e4b8378f1576e6ff256e7b0763eb895d64eb6c647
Type fulltextMimetype application/pdf

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CiteExportLink to record
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Citation style
  • apa
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Output format
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