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Chip-integrated bias circuits for MMIC
1999 (English)Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

The work that forms the basis of this report deals with bias circuits for MMIC amplifiers. The task was concentrated on bias for low noise amplifiers with pHEMT and MESFET, and power amplifiers built with HBT. The goal was to integrate the bias networks on-chip considering process dependence and temperature variations. To develop and examine the bias circuits the simulation tool MDS from Hewlett Packard was used. A method for simulating loop stability was developed. Two HBT and two MESFET bias circuits have been developed for use on MMIC. The simulations show that all circuits are useful for integration on chip. An attempt to design a differential amplifier built around depletion mode transistors was made but poor performance of the transistors made it unusable. To better simulate the temperature dependence of HBT bias circuits a transistor model developed at UCSD was adapted. To accomplish this, all parameters and appropriate equations were identified. Then the parameters in the HBT model were modified. The simulations show good agreement between measurements and the model.

Place, publisher, year, edition, pages
1999.
Keyword [en]
Technology, MMIC, bias, HBT, MESFET, stability, thermal temperature
Keyword [sv]
Teknik
Identifiers
URN: urn:nbn:se:ltu:diva-49501ISRN: LTU-EX--99/142--SELocal ID: 6d4a6a00-444a-418d-9161-54f35f27ff26OAI: oai:DiVA.org:ltu-49501DiVA: diva2:1022848
Subject / course
Student thesis, at least 30 credits
Educational program
Civil Engineering programmes 1997-2000, master's level
Examiners
Note
Validerat; 20101217 (root)Available from: 2016-10-04 Created: 2016-10-04Bibliographically approved

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  • apa
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