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Packet forwarding in an FPGA for the wireless packet platform
2002 (English)Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

This report describes a Master of Science thesis work performed at Ericsson Mobile Data Design AB in Gothenburg. The thesis work aims to investigate possible performance improvements in the Wireless Packet Platform by moving modules with harsh timing requirements from software to hardware. More specifically the packet forwarding functionality with underlying layers is implemented in a programmable circuit, an FPGA. The Wireless Packet Platform from Ericsson is a robust, general-purpose packet switching platform that is an important foundation in GPRS, 3G/UMTS and other packet switched telecommunication networks from Ericsson. The project resulted in implementing two redesigns of the original packet forwarding engines. Both redesigns built upon the distributed VPN forwarding scheme that is used in the original FE software implementation. The difference is that the forwarding logic and the interface driver support were implemented in the FPGA situated on the Interface Boards. The two FPGA-based redesigns had different purposes: the first design was used for verifying the functionality of the developed packet validation and forwarding modules, the second for achieving high packet throughput performance. The performance analysis of selected original forwarding engines and redesigns was performed in a SmartBits test environment. The results from the tests were very encouraging and the final FPGA-based redesign experienced a throughput capacity increase of at least 100% compared to the best original software implementation. Also latency performance and the CPU load of the tested systems indicated a clear advantage of the new designs compared to the original. This thesis work has showed that to be able to reach near full link utilization on the Interface Boards in the Wireless Packet Platform the forwarding engine needs to be implemented in hardware, preferably in programmable circuits like FPGAs to keep good flexibility. This is especially true in the future when the Ethernet interfaces will be upgraded to Gigabit Ethernet.

Place, publisher, year, edition, pages
Keyword [en]
Technology, FPGA, WPP, GPRS, packet forwarding
Keyword [sv]
URN: urn:nbn:se:ltu:diva-54962ISRN: LTU-EX--02/187--SELocal ID: be1ea787-a962-419d-800a-9e18bbc90888OAI: diva2:1028343
Subject / course
Student thesis, at least 30 credits
Educational program
Computer Science and Engineering, master's level
Validerat; 20101217 (root)Available from: 2016-10-04 Created: 2016-10-04Bibliographically approved

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