The department of Surface Surveillance Radar Systems, Signal Processing, at Ericsson Microwave Systems AB develops signal-processing functions used in radar system. The functions are implemented using Xilinx, XC40150XV, field programmable gate arrays (FPGAs). There is a need for faster and larger FPGAs named Virtex II. The functions are implemented using schematics. The schematics can not directly be used with the Virtex II chip, some kind of conversion is required. Adopting a new architecture also implies new design flows and new possibilities. The objective of this document is to find a suiting migrating flow for the signal processing functions, investigate new possibilities with the Virtex II FPGA and estimate turn-around-time. A migration flow has been developed. The flow has been tested on a design, verifying its functionality. The total turn around time has been estimated. New design flows has been investigated as well as the new possibilities concerning the Virtex II device.