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A write‐improved low‐power 12T SRAM cell for wearable wireless sensor nodes
Nanoscale Devices, VLSI Circuit & System Design Lab, Department of Electrical Engineering, Indian Institute of Technology, Indore, India.
Nanoscale Devices, VLSI Circuit & System Design Lab, Department of Electrical Engineering, Indian Institute of Technology, Indore, India.
Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.ORCID iD: 0000-0002-6055-3198
Electronic Circuit Design Lab, Department of Electronics and Nano Engineering, Aalto University, Espoo, Finland.
2018 (English)In: International journal of circuit theory and applications, ISSN 0098-9886, E-ISSN 1097-007X, Vol. 46, no 12, p. 2314-2333Article in journal (Refereed) Published
Abstract [en]

In this work, a data-dependent feedback-cutting–based bit-interleaved 12T static random access memory (SRAM) cell is proposed, which enhances the write margin in terms of write trip point (WTP) and write static noise margin (WSNM) by 2.14× and 8.99× whereas read stability in terms of dynamic read noise margin (DRNM) and read static noise margin (RSNM) by 1.06× and 2.6 ×, respectively, for 0.4 V when compared with a conventional 6T SRAM cell. The standby power has also been reduced to 0.93× with an area overhead of 1.49× as that of 6T. Monte Carlo simulation results show that the proposed cell offers a robust write margin when compared with the state-of-the-art memory cells available in the literature. An analytical model of WSNM for 12T operating in subthreshold region is also proposed, which has been verified using the simulation results. Finally, a small SRAM macro along with its independent memory controller has been designed. 

Place, publisher, year, edition, pages
John Wiley & Sons, 2018. Vol. 46, no 12, p. 2314-2333
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Research subject
Industrial Electronics
Identifiers
URN: urn:nbn:se:ltu:diva-70865DOI: 10.1002/cta.2555ISI: 000452447300010Scopus ID: 2-s2.0-85052789134OAI: oai:DiVA.org:ltu-70865DiVA, id: diva2:1248401
Note

Validerad;2018;Nivå 2;2018-12-06 (svasva)

Available from: 2018-09-14 Created: 2018-09-14 Last updated: 2021-10-15Bibliographically approved

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Chouhan, Shailesh Singh

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