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An ultra-low power, reconfigurable, aging resilient RO PUF for IoT applications
Nanoscale Devices, VLSI Circuit & System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology Indore, India.
Institute for Microelectronics, Technische Universität Wien, Vienna, Austria.
Nanoscale Devices, VLSI Circuit & System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology Indore, India.
Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
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2019 (English)In: Microelectronics Journal, ISSN 0959-8324Article in journal (Refereed) Epub ahead of print
Abstract [en]

Physically Unclonable Functions (PUF) have emerged as security primitives which can generate high entropy, temper resilient bits for security applications. However, the power budget of the ring oscillator (RO) PUF limits the use of RO PUF in IoT applications, in this concern a low power variant of RO PUF is much needed. In this paper, we have presented an ultra-low power, lightweight, configurable RO PUF based on the 4T XOR architecture. The proposed architecture is aging resilient; hence it produces a stable PUF output over the years. Also, it has a large number of challenge-response-pair (CRP) compared to the other architectures, which makes it suitable for chip identification as well as cryptographic key generation. The proposed PUF is implemented on 40 nm CMOS technology, and for the validation of design, we have also implemented on FPGA. The simulation results show that it has a uniqueness of 0.489 and worst-case reliability of 96.43% and 93.15% at 125 °C and 1.2 V, respectively. Compared to the conventional RO PUF it consumes 98.06% and 95.47% less dynamic and leakage power, respectively.

Place, publisher, year, edition, pages
Elsevier, 2019.
Keywords [en]
Lightweight, Low power architecture, Physically unclonable functions, Reliability, NBTI, IoT, Challenge-response pair, Security
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Research subject
Electronic systems
Identifiers
URN: urn:nbn:se:ltu:diva-75630DOI: 10.1016/j.mejo.2019.104605OAI: oai:DiVA.org:ltu-75630DiVA, id: diva2:1344550
Available from: 2019-08-21 Created: 2019-08-21 Last updated: 2019-08-21

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Chouhan, Shailesh Singh

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