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Automatic state machine reconstruction from legacy PLC using data collection and SAT solver
Computer Technologies Laboratory, ITMO University, St. Petersburg 197101, Russia.
Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Computer Science.
Computer Technologies Laboratory, ITMO University, St. Petersburg 197101, Russia.
ENEDIS, Saint-Pierre-la-Palud 69210, France.
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2020 (English)In: IEEE Transactions on Industrial Informatics, ISSN 1551-3203, E-ISSN 1941-0050Article in journal (Refereed) Epub ahead of print
Abstract [en]

Nowadays an increasing number of industries are considering moving towards being Industry 4.0 compliant. But this transition is not straightforward: transfer to new system can lead to significant production downtime, resulting in delays and cost overruns. The best way is systematic seamless transition to newer and advanced technologies that Industry 4.0 offers. This paper proposes a framework based on automatic synthesis methods that learns the behavior of an existing legacy programmable logic controller (PLC) and generates state machines that can be incorporated into IEC 61499 function blocks. Proposed algorithms are based on Boolean satisfiability (SAT) solvers. The first algorithm accepts a set of noisy PLC traces and produces a set of candidate state machines that satisfy the traces. The second algorithm accepts error-free traces and synthesizes a modular controller that may be distributed across several physical devices. The toolchain architecture is exemplified on a laboratory scale Festo mechatronic system.

Place, publisher, year, edition, pages
IEEE, 2020.
National Category
Computer Sciences
Research subject
Dependable Communication and Computation Systems
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URN: urn:nbn:se:ltu:diva-78840DOI: 10.1109/TII.2020.2992235OAI: oai:DiVA.org:ltu-78840DiVA, id: diva2:1429360
Available from: 2020-05-11 Created: 2020-05-11 Last updated: 2020-05-11

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Patil, SandeepVyatkin, Valeriy

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