Hardware Accelerated Machine Learning on Embedded Systems for Space ApplicationsShow others and affiliations
2021 (English)In: IAC 2021 Congress Proceedings, 72nd International Astronautical Congress (IAC), Dubai, United Arab Emirates, International Astronautical Federation, IAF , 2021, article id 66177Conference paper, Published paper (Refereed)
Abstract [en]
As spacecraft missions continue to increase in complexity, the system operation and amount of gathered data demand more complex systems than ever before. Currently, mission capabilities are constrained by the link bandwidth as well as on-board processing capacity, depending on a high number of commands and complex ground station systems to allow spacecraft operations. Thus, efficient use of the bandwidth, computing capacity and increased autonomous capabilities are of utmost importance. Artificial intelligence, with its vast areas of application scenarios, allows for these challenges and more to be tackled in spacecraft design. Particularly, the flexibility of neural networks as machine learning technology provides many possibilities. For example, neural networks can be used for object detection and classification tasks. Unfortunately, the execution of current machine learning algorithms consumes a large amount of power and memory resources, and qualified deployment remains challenging which limits their possible applications in space systems. Thus, an increase in efficiency is a major enabling factor for these technologies. The optimisation of the algorithm for System-on-Chip platforms allows it to benefit from the best of a generic processor and hardware acceleration shall allow broader applications of these technologies with a minimum increase of power consumption. Additionally, COTS embedded systems are commonly used in NewSpace applications due to the possibility to add external or software fault mitigation. For deployment of machine learning on such devices, a CNN model was optimised on a workstation. Then, the neural network is deployed with Xilinxâs Vitis AI onto different embedded systems that include a powerful generic processor as well as the hardware programming capabilities of an FPGA. This result was evaluated based on relevant performance and efficiency parameters and a summary is given in this paper. Additionally, a different approach was developed which creates, with a high-level synthesis tool, the hardware description language of an accelerated linear algebra optimized network. The implementation of this tool was started, and the proof of concept is presented. Furthermore, existing challenges with the auto-generated code are outlined and future steps to automate and improve the entire workflow are presented. This paper aims to contribute to increasing the efficiency and applicability of artificial intelligence in space. Specifically, the performance of machine learning algorithms is evaluated on FPGAs which are commonly used for complex algorithmsâ execution in space.
Place, publisher, year, edition, pages
International Astronautical Federation, IAF , 2021. article id 66177
Keywords [en]
Accelerated Linear Algebra, FPGA, High-Level Synthesis, Machine Learning, Neural Networks, Vitis AI
National Category
Embedded Systems Astronomy, Astrophysics and Cosmology
Research subject
Machine Learning; Onboard space systems
Identifiers
URN: urn:nbn:se:ltu:diva-90290Scopus ID: 2-s2.0-85127549033OAI: oai:DiVA.org:ltu-90290DiVA, id: diva2:1663327
Conference
72nd International Astronautical Congress (IAC), Dubai, United Arab Emirates, October 25-29, 2021
2022-06-022022-06-022022-10-24Bibliographically approved