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Novel Reversible Comparator Design in Quantum Dot-Cellular Automata with Power Dissipation Analysis
Department of Electrical Engineering, Islamic Azad University of Science and Research Tehran (Kerman) Branch, Kerman 7718184483, Iran.
Department of Mathematical Modeling, North-Caucasus Federal University, 355017 Stavropol, Russia; Department of Modular Computing and Artificial Intelligence, North-Caucasus Center for Mathematical Research, 355017 Stavropol, Russia.
Department of Information and Communication Technology (ICT), Mawlana Bhashani Science and Technology University, Tangail 1902, Bangladesh.
Luleå University of Technology, Department of Civil, Environmental and Natural Resources Engineering, Geosciences and Environmental Engineering. Facultad de Ingeniería y Ciencias, Universidad Adolfo Ibáñez, Diagonal Las Torres 2640, Peñalolén, Santiago 7941169, Chile; RIKEN Center for Advanced Photonics, RIKEN, Wako 351-0198, Saitama, Japan.ORCID iD: 0000-0002-8226-5883
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2022 (English)In: Applied Sciences, E-ISSN 2076-3417, Vol. 12, no 15, article id 7846Article in journal (Refereed) Published
Abstract [en]

In very large-scale integration (VLSI) circuits, a partial of energy lost leads to information loss in irreversible computing because, in conventional combinatorial circuits, each bit of information generates heat and power consumption, thus resulting in energy dissipation. When information is lost in conventional circuits, it will not be recoverable, as a result, the circuits are provided based on the reversible logic and according to reversible gates for data retrieval. Since comparators are one of the basic building blocks in digital logic design, in which they compare two numbers, the aim of this research is to design a 1-bit comparator building block based on reversible logic and implement it in the QCA with the minimum cell consumption, less occupied area, and lower latency, as well as to design it in a single layer. The proposed 1-bit reversible comparator is denser, cost-effective, and more efficient in quantum cost, power dissipation, and the main QCA parameters than that of previous works.

Place, publisher, year, edition, pages
MDPI, 2022. Vol. 12, no 15, article id 7846
Keywords [en]
QCA, reversible logic, comparator, Feynman gate, TR gate, coplanar, quantum cost, energy dissipation
National Category
Computer Engineering
Research subject
Waste Science and Technology
Identifiers
URN: urn:nbn:se:ltu:diva-92808DOI: 10.3390/app12157846ISI: 000839033700001Scopus ID: 2-s2.0-85136920356OAI: oai:DiVA.org:ltu-92808DiVA, id: diva2:1692932
Note

Validerad;2022;Nivå 2;2022-09-05 (hanlid)

Available from: 2022-09-05 Created: 2022-09-05 Last updated: 2022-09-12Bibliographically approved

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Otsuki, Akira

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