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  • 1. Alrifaiy, Ahmed
    et al.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Lindahl, Olof
    Ramser, Kerstin
    Luleå University of Technology, Department of Engineering Sciences and Mathematics, Fluid and Experimental Mechanics.
    A lab-on-a-chip for hypoxic patch clamp measurements combined with optical tweezers and spectroscopy: first investigations of single biological cells2015In: Biomedical engineering online, ISSN 1475-925X, E-ISSN 1475-925X, Vol. 14, article id 36Article in journal (Refereed)
    Abstract [en]

    The response and the reaction of the brain system to hypoxia is a vital research subject that requires special instrumentation. With this research subject in focus, a new multifunctional lab-on-a-chip (LOC) system with control over the oxygen content for studies on biological cells was developed. The chip was designed to incorporate the patch clamp technique, optical tweezers and absorption spectroscopy. The performance of the LOC was tested by a series of experiments. The oxygen content within the channels of the LOC was monitored by an oxygen sensor and verified by simultaneously studying the oxygenation state of chicken red blood cells (RBCs) with absorption spectra. The chicken RBCs were manipulated optically and steered in three dimensions towards a patch-clamp micropipette in a closed microfluidic channel. The oxygen level within the channels could be changed from a normoxic value of 18% O 2 to an anoxic value of 0.0-0.5% O 2. A time series of 3 experiments were performed, showing that the spectral transfer from the oxygenated to the deoxygenated state occurred after about 227 ± 1 s and a fully developed deoxygenated spectrum was observed after 298 ± 1 s, a mean value of 3 experiments. The tightness of the chamber to oxygen diffusion was verified by stopping the flow into the channel system while continuously recording absorption spectra showing an unchanged deoxygenated state during 5400 ± 2 s. A transfer of the oxygenated absorption spectra was achieved after 426 ± 1 s when exposing the cell to normoxic buffer. This showed the long time viability of the investigated cells. Successful patching and sealing were established on a trapped RBC and the whole-cell access (Ra) and membrane (Rm) resistances were measured to be 5.033 ± 0.412 M Ω and 889.7 ± 1.74 M Ω respectively.

  • 2.
    Beckman, Claes
    et al.
    Department of Communications systems, School of ICT, Royal Institute of Technology, Kista.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Tecsor, Irina
    Department of Communications systems, School of ICT, Royal Institute of Technology, Kista.
    Design considerations for the EISCAT-3D phased array antenna2014In: 2014 8th European Conference on Antennas and Propagation: (EuCAP); The Hague; Netherlands, 6 -11 April 2014, Piscataway, NJ: IEEE Communications Society, 2014, p. 1700-1704Conference paper (Refereed)
    Abstract [en]

    This paper presents a background and an overview of the initial design considerations for phased array antenna being designed for the New Generation multi-static, incoherent-scatter radar station - EISCAT-3D - in Northern Scandinavia. Its anticipated electrical, mechanical and environmental design requirements are given both by the physics as well as by the extreme climate in the subarctic region of northern Scandinavia

  • 3.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    On electronics for measurement systems2010Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    This thesis collects the work performed by the author on electronics for measurement systems. The first part is the work performed on the EISCAT 3D ionospheric research radar, including two papers on the investigations on required performance, electronics design, and proof of concept signal processing. The thesis also contains work on a calibration system for mitigating signal path variations in large antenna arrays with distributed front-end electronics, enabling accurate beamforming of the received signal. Although the proposed system could in theory be entirely free from systematic errors, very large receiver dynamic range would be required in systems with many channels. Thus, in this work the measurement accuracy degradation arising when trying to reduce the dynamic range requirements has been investigated. A second part is on electronics for ultrasonic measurement systems. As one part of this part of the work, the systematic errors that arise in ultrasonic transit-time flow-meters when not utilizing the reciprocity of the flow-meter have been investigated experimentally. Based on this an integrated circuit for driving ultrasonic transducers using an arbitrary excitation waveform while maintaining constant interface impedance was designed and evaluated. By driving the ultrasonic transducer directly from a DAC the clock to output delay uncertainty was minimized. This, combined with matched on-chip receiver isolation switches enable on-line calibration against an on-chip reference DAC. These two and a work on a low-noise CMOS amplifier for ultrasonic applications are covered in three papers attached to this thesis. The third and final part is on evaluation of charge coupled devices, presented in the last paper of the thesis. It proposes a method for separating measured charge transfer inefficiency of a CCD into incomplete transfer of free charge and charge trapping in the substrate. We derive a generic model for the combined effects of charge trapping and incomplete transfer. This model further allows the charge transfer defects of a single gate to be calculated from the combined transfer inefficiency of a larger CCD. As proof of concept the method is applied to measurement data from a CCD manufactured using a 0.18 μm PINNED photo diode CMOS process.

  • 4.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Performance and spatial sensitivity variations of single photon avalanche diodes manufactured in an image sensor CMOS process2015In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 36, no 11, p. 1118-1120Article in journal (Refereed)
    Abstract [en]

    In this letter we present the results from a series of single-photon avalanche diode (SPAD) structures implemented in a commercial 0.18 μm CMOS process intended for CMOS image sensors. Variations without effect on the performance and variations that produced non-functional devices are described. Devices based on the P+/NWELL and deep-NWELL/P-EPI SPADs junctions were found to work well in this process. When biased for 10% QE the best 10 μm diameter P+/NWELL SPADs exhibited a DCR of about 1 kHz, whereas the DCR of the deep-NWELL/P-EPI SPADs was only 10 Hz under the same conditions. We also show that the former type exhibited local sensitivity variations within the SPADs ranging from a factor 4 at low excess voltage to 1.2 at an excess voltage of about 0.5 V. No significant sensitivity variations were found for the deep- NWELL/P-EPI SPADs, but they were found to exhibit significant sensitivity outside the central junction, contributing from 8.3 % at low excess voltage to approximately 70% at high excess voltage

  • 5. Borg, Johan
    et al.
    Hyyppä, Kalevi
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Lindgren, Per
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Projekt: ESIS2010Other (Other (popular science, discussion, etc.))
    Abstract [sv]

    Samlingsprojekt för alla ESIS-projekt

  • 6.
    Borg, Johan
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    An ultrasonic transducer interface IC with integrated push-pull 40 Vpp, 400 mA current output, 8-bit DAC and integrated HV multiplexer2011In: IEEE Journal of Solid-State Circuits, ISSN 0018-9200, E-ISSN 1558-173X, Vol. 46, no 2, p. 475-484Article in journal (Refereed)
  • 7.
    Borg, Johan
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Delay insensitive signal-injection calibration for large antenna arrays using passive hierarchical networks2017In: IEEE Transactions on Antennas and Propagation, ISSN 0018-926X, E-ISSN 1558-2221, Vol. 65, no 1, p. 190-195, article id 7747455Article in journal (Refereed)
    Abstract [en]

    Efficient beamforming of phased-array antennas requires that the phase delay of each channel is accurately known. One technique for achieving this is to distribute a calibration or local-oscillator reference signal through a delay-insensitive signal distribution network. In this paper, we propose using passive hierarchical signal distribution networks to distribute such signals, a method that scales significantly better with the size of the array than existing signal distribution methods. We analyze the impact of impedance variations within the network on the phase accuracy and propose a calibration front-end architecture. This front end also enables the return loss and coupling between antennas to be monitored for diagnostic purposes. We present an implementation of this front end that was applied to a small prototype antenna array, and show that this implementation exhibited low sensitivity to delays within the calibration network, reduced the temperature-dependent phase error of the front ends substantially, and can be used for performing antenna return-loss measurements

  • 8.
    Borg, Johan
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Evaluation of a surface-channel CCD manufactured in a pinned active-pixel-sensor CMOS process2011In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 58, no 8, p. 2660-2664Article in journal (Refereed)
    Abstract [en]

    This paper presents measurements on a surfacechannel CCD with gates implemented using single-layer polysilicongates. The device was manufactured in a 0.18 μm PINNEDphoto diode CMOS process commercially available from UMC.The CCD was built with a field-plate covering all gates as wellas the space between them, which allows the potential in the gapbetween non-overlapping gates to be manipulated.We present charge transfer efficiency measurements performedat clock frequencies of 1 MHz and 5 MHz, at multiplebackground packet sizes, and field-plate voltages. We furtherpropose and apply a method for separating CTI in four-phaseCCDs due to trapping from the inefficiency stemming from otherphenomena.The measurements show a single stage CTI ranging from 1.7×10−4 with a moderate background charge and substantial fieldplatevoltage, to 0.007 at zero field-plate voltage and the highestbackground charge tested. The CTI can be reduced significantly(more than a factor of 10 in some cases) by applying a significantnegative voltage at the field-plate. This, and the fact that only aminor part of the CTI can be attributed to trapping, indicatesthat the performance of the device is limited by the presence ofpotential hollows in the gaps between the gates.

  • 9.
    Borg, Johan
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Optimization of the design of an integrated ultrasonic preamplifier2008In: Proceedings of the International Congress on Ultrasonics: Vienna, April 9-13, 2007, International Congress on Ultrasonics , 2008Conference paper (Refereed)
    Abstract [en]

    Traditionally BJT or BiCMOS amplifiers have been used to achieve equivalent input noise densities of 1 nV√Hz or less, as desirable in some ultrasonic applications. Due to an increasing demand on increased integration it can be necessary to implement the amplifier in a CMOS process. As part of this design process we applied the particle swarm optimization to the problem of optimizing an amplifier specifically for operation in the 2-4 MHz frequency band. We present measurements on the manufactured circuit with performance comparable to the best available BJT-based amplifiers available today.

  • 10.
    Borg, Johan
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    van Deventer, Jan
    Delsing, Jerker
    Reciprocal operation of ultrasonic transducers: experimental results2006In: Proceedings: 2006 IEEE Ultrasonics Symposium : Vancouver, Canada, 3 - 6 October 2006, Piscataway, NJ: IEEE Communications Society, 2006, p. 1013-1016Conference paper (Refereed)
    Abstract [en]

    Ultrasonic transit-time flow-meters estimate fluid or gas flows from the difference in times of flight of upstream and downstream acoustic pulses. However, any delay differences arising from sources other than the flow to be measured will cause a troublesome "zero flow" offset error.In theory, the transducers used in the measurement system should not influence the zero flow error, as electroacoustic systems based on piezoelectric transducers have been shown to be reciprocal (when the media is stationary). However, care is required when designing the electrical interfaces for the piezoelectric transducers, if reciprocity in the system is to be utilized.This work presents technique and measurements that apply reciprocity to an ultrasonic transit-time flow-meter. Specialized electrical transducer interfaces with options to drive the transducers from either low or high impedance sources were used. Combined with a high-impedance receive mode these options made it possible to change the conditions for reciprocity in the system.We show reduced delay difference in 9 cases out of 10 when trying to utilize the reciprocal property compared to when we disregard it in favor for larger excitation energy. The delay improvements were accompanied by reduced differences between the center frequencies of the signals from the two paths.

  • 11.
    Delsing, Jerker
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Architecture for extreme low power sensing in wireless sensor network devices2011In: SENSORCOMM 2011: The Fifth International Conference on Sensor Technologies and Applications, International Academy, Research and Industry Association (IARIA), 2011, p. 157-160Conference paper (Other academic)
    Abstract [en]

    When discussing powering wireless sensor network nodes, there are a few major energy consumers: communications, microcontroller and the sensor. We propose a wireless sensor network platform architecture minimizing the energy consumption of sensing. The architecture proposed herein is based on a reactive approach to sensing. A number of possible hardware approaches are evaluated and compared. This comparison indicates that analog storage between the sensing element and the sensor electronics can be a feasible method for reducing the energy consumption of the system.

  • 12.
    Delsing, Jerker
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    New architecture for efficient data sampling in Wireless Sensor Network Devices2013Conference paper (Refereed)
    Abstract [en]

    When discussing powering wireless sensor net- work nodes, there are a few major energy consumers: com- munications, microcontroller and the sensor. We propose a wireless sensor network platform architecture minimizing the energy consumption of sensing. The architecture proposed herein is based on a reactive approach to sensing. A number of possible hardware approaches are evaluated and compared. This comparison indicates that analog storage between the sensing element and the sensor electronics can be a feasible method for reducing the energy consumption of the system.

  • 13.
    Ekman, Jonas
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Lindgren, Per
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    De Lauretis, Maria
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Lindner, Marcus
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Nilsson, Joakim
    Projekt: Frekvensomriktares funktion i beredskapskritiska system2014Other (Other (popular science, discussion, etc.))
    Abstract [sv]

    Vid dödnätstart av produktionsanläggningar och drift av svaga nät eller ö-drift är frekvensomriktare som driver pumpar och fläktar kritiska komponenter. Om frekvensomriktare påverkas av störningar i nätet kan elproduktion kopplas bort och det svaga nätet eller ö-driften kollapsa. Projektet ska studera frekvensomriktare ur ett antal aspekter såsom uppbyggnad, styrning och implementering i syfte att utveckla mer robusta frekvensomriktare och implementering av dessa för att säkerställa drift av svaga nät och ö-drift och minimera ytterligare driftstörningar vid svåra påfrestningar på elnätet.

  • 14.
    Ekman, Jonas
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Lindgren, Per
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Variable-Frequency Drives: Three perspectives2014Conference paper (Refereed)
  • 15.
    Fischer, Julia
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    High frequency limitations of active rectifier circuits for RFID applications2016In: 2016 MIXDES: 23rd International Conference Mixed Design of Integrated Circuits and Systems, Lodz, Poland, 23-25 June 2016, Piscataway, NJ: IEEE Communications Society, 2016, p. 326-329, article id 7529757Conference paper (Refereed)
    Abstract [en]

    This paper analyses the frequency limitations of an active rectifier for RFID applications that has been optimised for 13.56 MHz. The rectifier utilises an active MOS diode with threshold cancellation and a control scheme to reduce reverse leakage. The rectifier is implemented in AMS 0.35 µm CMOS and simulated in Cadence Spectre. For an input voltage of 2 V and an output current of 20 µA, a power and voltage conversion efficiency of 83 % and 89 %, respectively, are achieved at 13.56 MHz. We show that reducing the width of the main MOS transistor from 90 to 60 µm improves the upper frequency limit, but beyond 30 MHz the finite speed of the threshold cancellation control circuit limits the efficiency of the rectifier circuit.

  • 16. Gabert, A.
    et al.
    Borg, Johan
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Temperature stabilization of electronics module2006In: The IMAPS Nordic Annual Conference: September 17-19, 2006, Gothenburg, Sweden / [ed] Jarkko Kutilainen, Oslo: International Microelectronics and Packaging Society (IMAPS) Nordic, 2006, p. 97-103Conference paper (Refereed)
    Abstract [en]

    Outdoor applications of electronics modules expose the systems to harsh environmental conditions. When very high performance is required, it may be necessary to actively stabilize the temperature in the module. This paper presents a systematic approach to the problem of designing a temperature stabilized environment for medium size electronics modules. The target system is the front-end electronics for the antennas in the EISCAT-3D incoherent scatter radar system. The electronics have an estimated constant power dissipation of about 10 W. Initially simulations verified the design approach and gave valuable information of the heat distribution in the box over the range of target temperatures. The design was evaluated by making a prototype on which different measurements were performed, which gave a clear picture of the system functionality. Using two Peltier modules and an insulated box a temperature stability of ±0.02°C at 20°C over an ambient temperature range of -40°C to 40°C was achieved.

  • 17. Johansson, Gustav
    et al.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Nordenvaad, Magnus Lundberg
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Signals and Systems.
    Wannberg, Gudmund
    Swedish Institute of Space Physics.
    Simulation of post-ADC digital beamforming for large aperture array radars2010In: Radio Science, ISSN 0048-6604, E-ISSN 1944-799X, Vol. 45, no RS3001Article in journal (Refereed)
    Abstract [en]

    This paper presents simulations and methods developed to investigate the feasibility of using a Fractional-Sample-Delay (FSD) system in the planned EISCAT_3D incoherent scatter radar. Key requirements include a frequency-independent beam direction over a 30 MHz band centered around 220 MHz, with correct reconstruction of pulse lengths down to 200 ns. The clock jitter from sample to sample must be extremely low for the integer sample delays. The FSD must also be able to delay the 30 MHz wide signal band by 1/1024th of a sample without introducing phase shifts, and it must operate entirely in baseband. An extensive simulation system based on mathematical models has been developed, with inclusion of performance-degrading aspects such as noise, timing error, and bandwidth. Finite Impulse Response (FIR) filters in the baseband of a band-pass-sampled signal have been used to apply true time delay beamforming. It has been confirmed that such use is both possible and well behaved. The target beam-pointing accuracy of 0.06° is achievable using optimized FIR filters with lengths of 36 taps and an 18 bit coefficient resolution. Even though the minimum fractional delay step necessary for beamforming is ∼13.1 ps, the maximum sampling timing error allowed in the array is found to be σ ≤ 120 ps if the errors are close to statistically independent.

  • 18.
    Johansson, Jonny
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Encapsulation method for smallwireless measurement systems in high temperature environments2016Conference paper (Refereed)
    Abstract [en]

    This paper presents an encapsulation concept that enables the construction of small wireless measurement systems that can operate in industrial environments with ambient temperatures of up to 1200°C. To maximize operational time and minimize size, a layer of thermal insulation is combined with water absorbed in a porous material in the core of the device. The simulated operating time before all of the frozen water at 0?C has transformed into steam at 100°C when the ambient temperature of the device was 1200°C is 21 minutes for a sphere with an outer radius of 4 cm. If the outer radius is increased to 10 cm the simulated operating time increases to 125 minutes. Measurements were performed to validate the design. When a sphere with a radius of 4 cm was subjected to an oven temperature of 1200°C the device held the core temperature at or below 101°C for a total of 25 minutes. The time to reach the boiling point of the water was 9 minutes. Thereafter, the temperature was held constant at 100 +/- 1°C for an additional 16 minutes whereafter a rapid rise in temperature took place once all water had evaporated.

  • 19.
    Johansson, Jonny
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Incorporation of mechanical noise in the SPICE model of a piezoelectric transducer2008In: Proceedings of the International Congress on Ultrasonics: Vienna, April 9-13, 2007, International Congress on Ultrasonics , 2008Conference paper (Refereed)
    Abstract [en]

    SPICE models of a piezoelectric device and the ultrasound propagation medium can be used in a simulator intended for electronic circuits and IC design to make efficient system level optimizations. This paper presents the inclusion of mechanical noise in the SPICE model of an ultrasound system. The modeling of the noise is based on the mechanical thermal noise which is equivalent to electronic Johnson (thermal) noise. For a system with a high-Q piezoelectric device designed into a medium-Q transducer the main energy loss, and thus also the main noise contribution, will occur in backing and sound propagation media. Thus, the modeling of the mechanical noise is performed by including electrical noise generation in the resistors that model these media in the electrical equivalent circuit. The resulting output voltage noise follows theoretical derivations of transducer noise as published by Farlow and Hayward. Simulations of a 4 MHz Pz27 piezoelectric disc with a diameter of 8 mm give a peak spectral noise density over 1 nV / √Hz, which is comparable to that achievable with low-noise preamplifiers.

  • 20.
    Johansson, Jonny
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Larsmark, Mikael
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Lindgren, Tore
    Lundberg Nordenvaad, Magnus
    Luleå University of Technology, Department of Business Administration, Technology and Social Sciences, Business Administration and Industrial Engineering.
    Johansson, Gustav
    Ekman, Jonas
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Ståbis, Joel
    Sverige.
    Project: EISCAT 3D2007Other (Other (popular science, discussion, etc.))
  • 21.
    Johansson, Jonny
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Gustav
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Larsmark, Mikael
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Lindgren, Tore
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    EISCAT_3D: EISCAT 3D Radar Receiver/Antenna Subsystem Report2009Report (Other academic)
  • 22.
    Lindgren, Tore
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    A measurement system for the position and phase errors of the elements in an antenna array subject to mutual coupling2012In: International Journal of Antennas and Propagation, ISSN 1687-5869, E-ISSN 1687-5877, Vol. 2012, article id 526121Article in journal (Refereed)
    Abstract [en]

    When deploying large antenna arrays in arctic environments, a local measurement system may be necessary in order to ensure control over the position and phase of the individual antenna elements. In this paper, a method of estimating the position and phase of each individual antenna element in the presence of mutual coupling is presented. It uses both measurements of the scattering matrix in the array and measurements of the electric field using a minimum of four probes located in the near field of the array. Simulations show that the method gives accurate results even in the presence of noise in the measurements. The geometry of the probe-array system affects the performance significantly.

  • 23.
    Nilsson, Joakim
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab. Imperial College London.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Chip-Coil Design for Wireless Power Transfer in Power Semiconductor Modules2018In: 2018 2nd Conference on PhD Research in Microelectronics and Electronics Latin America (PRIME-LA), Piscataway, NJ: IEEE, 2018Conference paper (Refereed)
    Abstract [en]

    This paper presents electromagnetic simulations of a wireless power transfer system suitable for a monitoring system for detection of solder fatigue in power semiconductor modules. Power is provided wirelessly from a printed spiral coil on a printed circuit board to a silicon chip with an on-chip coil. We use and adapt a known gradient-ascent-based optimisation algorithm to obtain suitable coil geometries. For a frequency of 433 MHz, the simulations show an efficiency of -34.7 dB which we conclude is sufficient for the proposed monitoring system.

  • 24.
    Nilsson, Joakim
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Leakage Current Compensation for a 450 nW, High Temperature, Bandgap Temperature Sensor2015In: Proceedings of the 19th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2015, Piscataway, NJ: IEEE Communications Society, 2015, p. 343-347, article id 7208540Conference paper (Refereed)
    Abstract [en]

    The design of a 450 nW bandgap temperature sensor in the 0 to 175 °C range is presented. The design demonstrates a leakage current compensation technique that is useful for low-power designs where transistor performance is limited. The technique mitigates the effects of leakage in Brokaw bandgap references by limiting the amount of excess current that is entering the bases of the main bipolar pair due to leakage. Using this technique, Monte Carlo simulations show an improvement factor of 7.6 for the variation of the temperature sensitivity over the full temperature range. For the variation of the reference voltage, Monte Carlo simulations show an improvement factor of 2.3.Sensors built using this technique can be used to accurately monitor the temperature of power semiconductors since wireless temperature sensors become feasible with sufficiently low power consumption.

  • 25.
    Nilsson, Joakim
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Load-Dependent Power Transfer Efficiency forOn-Chip CoilsManuscript (preprint) (Other academic)
    Abstract [en]

    This paper presents a theory for the power transfer efficiency to on-chip coils, with focus on load-dependence for low-power single-chip systems. The theory is verified with electromagnetic simulations modelled on a 350~nm process which in turn are verified by measurements on manufactured integrated circuits. The power transfer efficiency is evaluated by on-chip rectification of a 225~MHz signal transmitted by a spiral coil printed on a ceramic substrate at 10 mm of separation. Such an approach avoids the influence of off-chip parasitic elements such as bond-wires which would reduce the accuracy of the evaluation.It is found that there exists a lower limit for the load below which reducing the power consumption of on-chip circuits yield no increase in power consumption. The paper is focused on the analysis and verification of the theory behind this limit.We relate the results presented in this work to the application of wireless single-chip temperature monitoring of power semiconductors.

  • 26.
    Nilsson, Joakim
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Single Chip Wireless Condition Monitoring of Power Semiconductor Modules2015In: Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC), 2015, Piscataway, NJ: IEEE Communications Society, 2015, article id 7364407Conference paper (Refereed)
    Abstract [en]

    A concept for doing accurate monitoring of temperature in power semiconductor modules is proposed. The concept involves glueing wireless single-chip temperature sensors with on-chip coils in direct contact with power semiconductor devices within their modules. Direct contact results in accurate temperature measurements while wireless technology such as RFID provides galvanic isolation from the power devices. An overview of the electromagnetic situation within wire bond power semiconductor modules is presented and a prototype chip with an on-chip coil has been manufactured as an initial attempt to investigate the feasibility of the concept. Measurements on said chip provides some insight in the challenges in on-chip coil designs. The feasibility of the concept is supported by earlier work that have demonstrated high power transfer efficiencies and a low power temperature sensor that is able to operate at high temperatures.

  • 27.
    Rabén, Hans
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    A discrete model of the DC charge-up phase in RFID rectifiers2013In: Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems: MIXDES 2013; Gdynia; 20 June 2013 through 22 June 2013, Piscataway NJ: IEEE Communications Society, 2013, p. 341-345, article id 6613370Conference paper (Refereed)
    Abstract [en]

    This paper presents a discrete model of the DC charge-up phase in a single MOS diode rectifier for an inductively coupled RFID system. The model was derived for a rectifier driven by a coil antenna and with a storage capacitor connected to the output. A comparison between the model and a simulation of a rectifier implemented in a 0.35 μm CMOS process demonstrated fast and accurate modeling of the charge up-phase for both LF and HF RFID applications. The model was used to determine the relationship between the voltage induced in the coil antenna and the available chip current based on a specification for the durations of the charge-up and the data-communication phases in a typical LF RFID application.

  • 28.
    Rabén, Hans
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    A model for MOS diodes with vth-cancellation in RFID rectifiers2012In: IEEE Transactions on Circuits and Systems - II - Express Briefs, ISSN 1549-7747, E-ISSN 1558-3791, Vol. 59, no 11, p. 761-765Article in journal (Refereed)
    Abstract [en]

    A theoretical model for diode-connected MOS transistors with a threshold cancellation technique is developed. The model is based on a detailed analysis of the technique with internal threshold cancellation (ITC) and reveals design insight and performance limitations. Derived design equations illustrate the tradeoff between the voltage drop and the reverse leakage of the diode. Furthermore, a design procedure for the optimization of the power conversion efficiency (PCE) of a bridge rectifier with ITC MOS diodes was developed based on the model. A rectifier was designed and implemented in an austriamicrosystems 0.35-$muhbox{m}$ CMOS process, and Cadence simulation results of the PCE and the voltage conversion efficiency show good agreement with the model.

  • 29.
    Rabén, Hans
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    An active MOS diode with V th-cancellation for RFID rectifiers2012In: 2012 IEEE International Conference on RFID (RFID 2012): Orlando, Florida, USA, 3 - 5 April 2012, Piscataway, NJ: IEEE Communications Society, 2012, p. 54-57Conference paper (Refereed)
    Abstract [en]

    An active MOS diode for low voltage and low power RFID rectifiers is presented. The diode is based on the technique with internal threshold cancellation (ITC) for MOS diodes and uses a simple control scheme to minimize the diode reverse leakage so that full threshold cancellation is achieved. A theoretical background that illustrates the limitations with the ITC diode and a detailed presentation of the proposed diode with a short design procedure is included. The proposed diode is implemented in AMS 0.35 μm CMOS and simulated in Cadense Spectre in a single diode rectifier. With a diode voltage ranging from 50 to 100 mV, the proposed diode simultaneously demonstrates improved voltage and power conversion efficiency of more than 20 % each for frequencies up to 1 MHz, as compared to the MOS diode with internal threshold cancellation.

  • 30.
    Rabén, Hans
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Design of voltage multipliers for maximized DC generation in inductively coupled RFID tags2014In: IEEE Transactions on Circuits and Systems Part 1: Regular Papers, ISSN 1549-8328, E-ISSN 1558-0806, Vol. 61, no 11, p. 3309-3317Article in journal (Refereed)
    Abstract [en]

    This paper presents models, circuit solutions and design procedures for maximized DC generation in inductively coupled RFID tags. An analytical model for the DC generation is derived, and relationships between the received signal in the tag coil antenna and the generated DC supply voltage using a voltage multiplier, based on both passive and active diodes, are presented. Derived from the trade-off between voltage gain in the multiplier and the tag coil at resonance, an equation for the optimum number of multiplier stages to achieve maximized DC generation is presented. Based on the derived equation, design examples are included with two typical tag coil antennas given a specification of the DC supply voltage and current. Also included in this paper is the design of a voltage multiplier based on active diodes implemented and manufactured in AMS 0.35 $mu{rm m}$ CMOS process. The active diodes are based on a concept of threshold cancellation of MOS diodes and make use of reverse leakage control to achieve full threshold cancellation.

  • 31.
    Rabén, Hans
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Improved efficiency in the CMOS cross-connected bridge rectifier for RFID applications2011In: Proceedings of the 18th International Conference Mixed Design of Integrated Circuits and Systems: MIXDES 2011; Gliwice; 16 June 2011 through 18 June 2011, Piscataway, NJ: IEEE Communications Society, 2011, p. 334-339Conference paper (Refereed)
    Abstract [en]

    A bridge rectifier based on the cross-connected NMOS-PMOS bridge that avoids the inherent degradation of power conversion efficiency for increasing input levels is presented. Instead of PMOS switches, the proposed rectifier uses diode-connected MOS transistors with static threshold cancellation and minimised diode reverse leakage. With a simple and power efficient circuit solution the new rectifier allows for low-power, passive tag implementation in standard CMOS for both LF and HF RFID applications. Simulation results of the proposed rectifier in a 0.35 µm CMOS process show a power conversion efficiency over 60 % for all input levels above 0.75 V with a 100 kΩ load and an input signal frequency of 13.56 MHz. The simulated DC output voltage at the same conditions is approximately Vin - 0.3 V. A model for the PCE of the new rectifier that includes the impact of the Vth-generator is developed and compared with simulated results.

  • 32.
    Rabén, Hans
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    A CMOS Front-end for RFID Transponders Using Multiple Coil Antennas2015In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 83, no 2, p. 149-159Article in journal (Refereed)
    Abstract [en]

    A front-end architecture for inductive RFID transponders using multiple coil antennas for reduced ori- entation sensitivity is presented. The front-end uses multiple antennas for reception and one antenna for transmission. A select function identifies the antenna that is most favorably oriented toward the reader for transmission by comparing the DC charge-up phases of multiple DC generation blocks during power-up of the transponder. CMOS circuit design and simulation results of a front-end for 125 kHz FSK modulation are presented for a pulsed RFID system as well as an archi- tecture for cascaded DC generation. This paper also includes an example of a coil antenna for spherical transponders using three independent orthogonal windings.

  • 33. Stenberg, Gustav
    et al.
    Borg, Johan
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Wannberg, Gudmund
    EISCAT Scientific Association, Kiruna.
    Simulation of post-ADC digital beam-forming for large area radar receiver arrays2007In: Proceedings: 2006 International RF and Microwave Conference : September 12 - 14, 2006, Putrajaya, Malaysia / [ed] Zaiki Awang, Piscataway, NJ: IEEE Communications Society, 2007, p. 272-276Conference paper (Refereed)
    Abstract [en]

    In order to provide instantaneous three-dimensional radar measurements spanning the entire vertical extent of the ionosphere, the planned EISCAT 3D incoherent scatter radar system includes multiple receive-only antenna arrays, situated at 90-280 km from the main transmit/receive site. These will employ band-pass sampling at ∼80 MHz, with the input signal spectrum contained in the 6th Nyqvist zone. This paper presents simulations and methods used to investigate use of a post-ADC fractional-sample-delay (FSD) system necessary to perform true time-delay beamforming. To test the feasibility and limitations of the system an extensive simulation tool has been developed. The simulation system is implemented in matlab to provide cross-platform compatibility and can be applied to any similar system. Performance degrading aspects such as noise, jitter, bandwidth and resolution can be included in the simulations. The use of FIR-filters in the base-band of a band-pass sampled signal to apply true time-delay beam-forming is shown to be feasible.

  • 34.
    Tanveer, Muhammad
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Time stretcher for a time-to-digital converter with a precisely matched current mirror2014In: 2014 IEEE International System on Chip Conference (SOCC 2014): Las Vegas, 2-5 September 2014, Piscataway, NJ: IEEE Communications Society, 2014, p. 225-230, article id 6948932Conference paper (Refereed)
    Abstract [en]

    This paper presents an approach for the design ofa time stretcher based on charging and discharging a capacitorby currents with a ratio equal to the desired stretch factor. Thestretched time interval can be measured by using a time-to-digitalconverter to achieve improved system resolution. Expressionsfor the current source output impedance and transistor arearequired to reach a specified linearity and matching are derived.The realization uses wide-swing current mirrors to achieve therequired output impedance at an acceptable voltage swing at thecapacitor. The derived expressions and the overall design arevalidated with schematic and extracted simulations in a 0.35 μmCMOS process technology.

  • 35.
    Tanveer, Muhammad
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Kostamovaara, Juha
    Oulu University of Technology.
    Hyyppä, Kalevi
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    An analogue time stretcher for a 3D time of flight camera2012Conference paper (Refereed)
    Abstract [en]

    The analogue time expansion technique, where the time interval to be measured is stretched by a factor k, can be realized with current integration. This kind of time stretcher can be used as a time domain amplifier to improve the precision of the time to digital conversion. Two specific circuit techniques have been investigated for the realization of a time stretcher in a CMOS technology. A comparison has been made between a Miller and an open-loop integrator based time stretcher with respect to the available linearity, power consumption and circuit area. The simulations show that the open loop approach with carefully optimized circuit configurations may lead to a compact and low power single photon avalanche diode pixel configuration with the required time amplification property. The application field for the studied techniques in this work is the on-pixel-based time interval measurement unit in 3D time-of-flight cameras based on a 2D single photon avalanche diode array.

  • 36.
    Tanveer, Muhammad
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Nissinen, Ilkka
    Department of Electrical Engineering, University of Oulu.
    Nissinen, Jan
    Department of Electrical Engineering, University of Oulu.
    Kostamovaara, Juha
    Department of Electrical Engineering, University of Oulu.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Time-to-digital converter based on analog time expansion for 3D time-of-flight cameras2014In: Image Sensors and Imaging Systems 2014 / [ed] Ralf Widenhorn; Antoine Dupret, SPIE - International Society for Optical Engineering, 2014, article id 90220AConference paper (Refereed)
    Abstract [en]

    This paper presents an architecture and achievable performance for a time-to-digital converter, for 3D time-of-flight cameras. This design is partitioned in two levels. In the first level, an analog time expansion, where the time interval to be measured is stretched by a factor k, is achieved by charging a capacitor with current I, followed by discharging the capacitor with a current I/k. In the second level, the final time to digital conversion is performed by a global gated ring oscillator based time-to-digital converter. The performance can be increased by exploiting its properties of intrinsic scrambling of quantization noise and mismatch error, and first order noise shaping. The stretched time interval is measured by counting full clock cycles and storing the states of nine phases of the gated ring oscillator. The frequency of the gated ring oscillator is approximately 131 MHz, and an appropriate stretch factor k, can give a resolution of ≈ 57 ps. The combined low nonlinearity of the time stretcher and the gated ring oscillator-based time-to-digital converter can achieve a distance resolution of a few centimeters with low power consumption and small area occupation. The carefully optimized circuit configuration achieved by using an edge aligner, the time amplification property and the gated ring oscillator-based time-to-digital converter may lead to a compact, low power single photon configuration for 3D time-of-flight cameras, aimed for a measurement range of 10 meters

  • 37.
    Tanveer, Muhammad
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Nissinen, Ilkka
    Department of Electrical Engineering, University of Oulu.
    Nissinen, Jan
    Department of Electrical Engineering, University of Oulu.
    Kostamovaara, Juha
    Department of Electrical Engineering, University of Oulu.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Time-to-Digital Converter using an Analogue Time Stretcher for 3D Time of Flight Camera2014Conference paper (Refereed)
    Abstract [en]

    This paper describes an architecture and achievable performance of a time-to-digital converter by cascading a time stretcher and a gated ring oscillator based time-to-digital converter (GRO-TDC). The analogue time expansion, where the time interval to be measured is stretched by a factor k, is realized by charging a capacitor with a current I followed by discharging the capacitor by a current I/k . The currents are created by wide swing cascode current source/sinks with a current ratio of k. The time stretching method involves two conversions: time to charge and then charge to time. Whereas these are performed in each individualpixel, the final time to digital conversion is performed by the global GRO-TDC, where a multiphase gated ring oscillator is used to measure the stretched time interval by counting full clock cycles and storing the states of the ring oscillator within the clock period to obtain increased resolution. A block diagram of the proposed structure is shown paper.The nine phase single ended gated ring oscillator operates as an interpolator and as a clock during charge to time conversion. The layout of the gated inverters in the oscillator is designed by placing them in an order to compensate for the parasitic loading of capacitance for each stage and to minimize the effects of process variations. The clock of the 8-bit ripple counter is enabled at the start of the charge to time conversion by the Start-Stretch signal. The result of the counter will be ready after the clock of the counter is disabled to the counter by the Stop-Stretch timing mark from the comparator. Special attention is paid to the design of the hysteresis based comparator using positive feedback. The comparator is designed to achieve acceptable robustness against transistor mismatch, small power dissipation, offset voltage, linearity, speed, small area and good noise immunity. The digital flip-flops functioning as an interpolator will store the time interval measurement responses with in the clock cycle. By selecting an appropriate stretch factor and suitable clock frequency for the gated ring oscillator, measurement error of few cm in distance is achievable. To ensure reliable recording of the timing signals, the counter is synchronized by usinga dual edge synchronization scheme where one of the two flip-flops always has enough delay between data change and clock edge to avoidmetastability problems.

  • 38.
    Wannberg, Gudmund
    et al.
    Swedish Institute of Space Physics / Institutet för rymdfysik.
    Andersson, H
    EISCAT Scientific Association, Kiruna.
    Behlke, R
    Auroral Observatory, University of Tromsö.
    Belyey, V
    Auroral Observatory, University of Tromsö.
    Bergqvist, Peter
    EISCAT Scientific Association, Kiruna.
    Borg, Johan
    Brekke, A
    Auroral Observatory, University of Tromsö.
    Delsing, Jerker
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Eliasson, L
    Swedish Institute of Space Physics / Institutet för rymdfysik.
    Finch, I
    Space Science and Technology Department, Rutherford Appleton Laboratory.
    Grydeland, T
    Auroral Observatory, University of Tromsö.
    Gustavsson, B
    Auroral Observatory, University of Tromsö.
    Häggström, I
    EISCAT Scientific Association, Kiruna.
    Harrison, R.A.
    Space Science and Technology Department, Rutherford Appleton Laboratory.
    Iinatti, T
    EISCAT Scientific Association, Kiruna.
    Johansson, Gustav
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, J
    Swedish Institute of Space Physics / Institutet för rymdfysik.
    Hoz, C La
    Auroral Observatory, University of Tromsö.
    Laakso, T
    EISCAT Scientific Association, Kiruna.
    Larsen, R
    EISCAT Scientific Association, Kiruna.
    Larsmark, Mikael
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Lindgren, Tore
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Nordenvaad, Magnus Lundberg
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Signals and Systems.
    Markkanen, J
    EISCAT Scientific Association, Kiruna.
    Wolf, I
    Swedish Institute of Space Physics / Institutet för rymdfysik.
    EISCAT_3D - a next-generation European radar system for upper atmosphere and geospace research2010In: Radio Science Bulletin, ISSN 1024-4530, no 332, p. 75-88Article in journal (Refereed)
    Abstract [en]

    The EISCAT Scientifi c Association, together with a number of collaborating institutions, has recently completed a feasibility and design study for an enhanced performance research radar facility to replace the existing EISCAT UHF and VHF systems. This study was supported by EU Sixth-Framework funding. The new radar retains the powerful multi-static geometry of the EISCAT UHF, but will employ phased arrays, direct-sampling receivers, and digital beamforming and beam steering. Design goals include, inter alia, a tenfold improvement in temporal and spatial resolution, an extension of the instantaneous measurement of full-vector ionospheric drift velocities from a single point to the entire altitude range of the radar, and an imaging capability to resolve small-scale structures. Prototype receivers and beamformers are currently being tested on a 48-element, 224 MHz array (the "Demonstrator") erected at the Kiruna EISCAT site, using the EISCAT VHF transmitter as an illuminator.

1 - 38 of 38
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