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  • 1.
    Ekman, Jonas
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Lindgren, Per
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    De Lauretis, Maria
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Lindner, Marcus
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Nilsson, Joakim
    Projekt: Frekvensomriktares funktion i beredskapskritiska system2014Other (Other (popular science, discussion, etc.))
    Abstract [sv]

    Vid dödnätstart av produktionsanläggningar och drift av svaga nät eller ö-drift är frekvensomriktare som driver pumpar och fläktar kritiska komponenter. Om frekvensomriktare påverkas av störningar i nätet kan elproduktion kopplas bort och det svaga nätet eller ö-driften kollapsa. Projektet ska studera frekvensomriktare ur ett antal aspekter såsom uppbyggnad, styrning och implementering i syfte att utveckla mer robusta frekvensomriktare och implementering av dessa för att säkerställa drift av svaga nät och ö-drift och minimera ytterligare driftstörningar vid svåra påfrestningar på elnätet.

  • 2.
    Eliasson, Jens
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Punal, Pablo
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Mäkitaavola, Henrik
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Delsing, Jerker
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Nilsson, Joakim
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Gebart, Joakim
    Eistec AB.
    A Feasibility Study of SOA-enabled Networked Rock Bolts2014In: Proceedings of 2014 IEEE 19th International Conference on Emerging Technologies & Factory Automation (ETFA 2014): Barcelona, Spain, 16-19 Sept. 2014, Piscataway, NJ: IEEE Communications Society, 2014, p. 1-8, article id 7005072Conference paper (Refereed)
    Abstract [en]

    The use of rock bolts in the mining industry is a widely used approach for increasing mine stability. However, when compared to the automation industry, where the use of sensors and real-time monitoring of processes have evolved rapidly, the use rock bolts have not changed a lot during the last 100 years. What is missing are technologies for keeping installed rock bolts under real-time and online monitoring. One problem is that rock bolts can become damaged by seismic activities or movements within the rock, and thus lose their load bearing capacity. If that happens, the outer shell of a tunnel’s walls or ceiling can collapse, with disaster as a result. Therefore, there is a clear need for online and real-time monitoring solutions for strain and thereby stress, as well as seismic activity. In this paper, the current state of art in research around intelligent rock bolts is presented. An intelligent rock bolt is the combination of a traditional rock bolt with an Internet of Things device, i.e. a rock bolt with embedded sensors, actuators, processing capabilities and wireless communication. In the proposed architecture, every rock bolt has its own IPv6 address and can establish a wireless mesh network in an ad-hoc manner. Bymeasuring strain and seismic activity and exposing the sensors in the form of services, large gains in terms of safety and efficiently can be achieved. A number of mining related activities such as stress on the rock bolt can be detected, falling rocks and the presence of mobile machinery can be observed. Since the network is based on standard communication protocols such as IPv6, it is vital to add security mechanisms to prevent eavesdropping and tampering of data traffic. By utilizing the real-time monitoring capabilities of a network of Internet-connected intelligent rock bolt, it is possible to drastically improve monitoring of mining activities and thereby providing workers with a safer working environment.

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  • 3.
    Karvonen, Niklas
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Computer Science.
    Jimenez, Lara Lorna
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Computer Science.
    Gomez Simon, Miguel
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Computer Science.
    Nilsson, Joakim
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Kikhia, Basel
    Faculty of Health and Sport Sciences, University of Agder 4879 Grimstad, Norway.
    Hallberg, Josef
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Computer Science.
    Classifier Optimized for Resource-constrained Pervasive Systems and Energy-efficiency2017In: International Journal of Computational Intelligence Systems, ISSN 1875-6891, E-ISSN 1875-6883, Vol. 10, no 1, p. 1272-1279Article in journal (Refereed)
    Abstract [en]

    Computational intelligence is often used in smart environment applications in order to determine a user’scontext. Many computational intelligence algorithms are complex and resource-consuming which can beproblematic for implementation devices such as FPGA:s, ASIC:s and low-level microcontrollers. Thesetypes of devices are, however, highly useful in pervasive and mobile computing due to their small size,energy-efficiency and ability to provide fast real-time responses. In this paper, we propose a classi-fier, CORPSE, specifically targeted for implementation in FPGA:s, ASIC:s or low-level microcontrollers.CORPSE has a small memory footprint, is computationally inexpensive, and is suitable for parallel processing.The classifier was evaluated on eight different datasets of various types. Our results show thatCORPSE, despite its simplistic design, has comparable performance to some common machine learningalgorithms. This makes the classifier a viable choice for use in pervasive systems that have limitedresources, requires energy-efficiency, or have the need for fast real-time responses.

    Download full text (pdf)
    CORPSE.pdf
  • 4.
    Karvonen, Niklas
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Nilsson, Joakim
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Kleyko, Denis
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Computer Science.
    Jimenez, Lara Lorna
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Computer Science.
    Low-Power Classification using FPGA: An Approach based on Cellular Automata, Neural Networks, and Hyperdimensional Computing2019In: 2019 18th IEEE International Conference On Machine Learning And Applications (ICMLA) / [ed] M. Arif Wani, Taghi M. Khoshgoftaar, Dingding Wang, Huanjing Wang, Naeem (Jim) Seliya, IEEE, 2019, p. 370-375Conference paper (Other academic)
    Abstract [en]

    Field-Programmable Gate Arrays (FPGA) are hardware components that hold several desirable properties for wearable and Internet of Things (IoT) devices. They offer hardware implementations of algorithms using parallel computing, which can be used to increase battery life or achieve short response-times. Further, they are re-programmable and can be made small, power-efficient and inexpensive. In this paper we propose a classifier targeted specifically for implementation on FPGAs by using principles from hyperdimensional computing and cellular automata. The proposed algorithm is shown to perform on par with Naive Bayes for two benchmark datasets while also being robust to noise. It is also synthesized to a commercially available off-the-shelf FPGA reaching over 57.1 million classifications per second for a 3-class problem using 40 input features of 8 bits each. The results in this paper show that the proposed classifier could be a viable option for applications demanding low power-consumption, fast real-time responses, or a robustness against post-training noise.

  • 5.
    Nilsson, Joakim
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Wireless High-Temperature Monitoring of Power Semiconductors: A Single-Chip Approach2019Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    Because failures in power electronic equipment can cause production stops and unnecessary damage to interconnected equipment, monitoring schemes that are able to predict such failures provide various economic and safety benefits. The primary motivation for this thesis is that such monitoring schemes can increase the reliability of energy production plants. Power semiconductors are crucial components in power electronic equipment, and monitoring their temperatures yields information that can be used to predict emerging failures.This thesis presents a system concept for wireless, single-chip, high-temperature monitoring of power semiconductors. A wireless single-chip solution is both cost effective and easy to integrate with existing power semiconductor modules. However, the concept presents two major challenges: the implementation of wireless power and communication, and the low-power design of the temperature sensors. To address these challenges, the feasibility of using on-chip coils to provide communication with and to obtain power from an external reader coil is demonstrated, and a low-power, high-temperature bandgap temperature sensor is developed.For the challenge of generating geometries of on-chip coils with high power transfer efficiencies, a gradient ascent algorithm is used to generate geometries that provide high power transfer efficiency at the frequency of interest. A theory is developed, focused on the relation between optimised coil geometries and the load requirements of an application. A cutoff-point is discovered, beyond which power delivered to the load does not increase even if the load is made lighter. Electromagnetic simulations for an on-chip coil model are presented, which show that this load-limit lies around 10 kΩ for one 350 nM process. The model is verified with measurements on manufactured devices.To generate coils which operate within a desired frequency band in which sufficient radiated energy is permitted, a methodology for tuning on-chip coils with on-chip fuses is presented. The decision to use fuses for tuning instead of transistors for this application is due a transistor's requirement of a DC supply for bias. For wireless single-chip systems, no such DC supply is available at system start-up. The methodology presented addresses the challenge of achieving high Q~factors for capacitor-fuse series connections despite the fact the fuse resistance of on-chip fuses is finite in their blown state and non-zero in their active state.A single-chip, on-chip coil solution comes with advantages such as galvanic isolation from the power device and simplicity of integration in existing modules. However, because a wireless design with a small on-chip coil will limit the amount of available power, it incurs the disadvantage of requiring a low-power design for the temperature sensor. Therefore, a design is presented of a temperature sensor consuming power in the microwatt range in the high-temperature region where it is useful for detecting incipient faults, particularly solder faults. This is achieved by compensating for leakage currents that arise in hot reverse-biased p-n junctions, which become significant at these temperatures.At high temperatures, these leakage currents can approach or even surpass the level of a circuit's quiescent current. Earlier work on leakage current compensation techniques is examined, compared to and combined with a compensation technique designed to compensate for collector-base leakage in the main bipolar pair of a Brokaw bandgap reference. Experiments show that fully analogue sensors operating at up to at least 230 °C for a sensitivity of 2 mV/°C are feasible at a power consumption around 10 µW. Such sensors would yield a resolution of 2 °C if an 8-bit analogue-to-digital converter is employed. However, the transmission of data to the transmitter coil remains future work. Furthermore, a discussion is held to address design of unimplemented system components which are needed in order to implement a complete single-chip temperature measurement system. Points discussed include high-temperature analogue-to-digital conversion, clock generation and wireless communication.

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    fulltext
  • 6.
    Nilsson, Joakim
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Wireless, Single Chip, High Temperature Monitoring of Power Semiconductors2016Licentiate thesis, comprehensive summary (Other academic)
    Abstract [en]

    Because failures in power electronics can cause production stops and unnecessary damage to interconnected equipment, monitoring schemes that are able to predict such failures provide various economic and safety benefits. The primary motivation for this thesis is that such monitoring schemes can increase the reliability of energy production plants. Power semiconductors are crucial components in power electronics, and monitoring their temperatures yields information that can be used to predict incipient failures.This thesis presents a system concept for wireless, single-chip, high-temperature monitoring of power semiconductors. A wireless single-chip solution is both cost effective and easy to integrate with existing power semiconductor modules. However, the concept presents two major challenges: the implementation of wireless power and communication, and the low-power design of the temperature sensors. Thus, the feasibility of using on-chip coils to provide communication with and obtain power from an external reader coil is assessed, and a low-power, high-temperature bandgap temperature sensor is developed. The sensor is capable of operating in the high-temperature range, allowing it to be useful for detecting incipient faults, particularly solder faults, at up to 230 °C. This is achieved by compensating for leakage currents that arise in hot reverse-biased p-n junctions, which become significant at these high temperatures.A single-chip, on-chip coil solution provides the combined advantages of galvanic isolation from the power device and simplicity of integration in existing modules. However, as the use of a wireless design with a small on-chip coil will limit the amount of available power, it incurs the disadvantage of requiring a low-power design for the sensor. Initial experiments have been performed on a prototype on-chip coil to assess the feasibility of this concept and provide insight into the challenges of on-chip coil design.In this thesis, focus is placed on the challenge of how to handle large leakage currents in low-power integrated silicon circuits. At high temperatures, these leakage currents can approach or even surpass the level of the circuit's quiescent current. Earlier work on leakage current compensation techniques is examined, compared to and combined with a compensation technique designed to compensate for collector-base leakage in the main bipolar pair of a Brokaw bandgap reference. Experiments show that fully analogue sensors operating at up to 228 °C with an accuracy of 10 °C that consume only 8.2 µW are feasible. If a higher accuracy, such as 3 °C, is required, then a temperature range of up to 200 °C can be achieved with a power consumption of 2.3 µW.It is likely that the high temperature range and low power consumption of the sensors presented in this thesis, in combination with on-chip coils, will make them suitable for use in solder fault prediction in power semiconductor modules.

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  • 7.
    Nilsson, Joakim
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab. Imperial College London.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Chip-Coil Design for Wireless Power Transfer in Power Semiconductor Modules2018In: 2018 2nd Conference on PhD Research in Microelectronics and Electronics Latin America (PRIME-LA), Piscataway, NJ: IEEE, 2018Conference paper (Refereed)
    Abstract [en]

    This paper presents electromagnetic simulations of a wireless power transfer system suitable for a monitoring system for detection of solder fatigue in power semiconductor modules. Power is provided wirelessly from a printed spiral coil on a printed circuit board to a silicon chip with an on-chip coil. We use and adapt a known gradient-ascent-based optimisation algorithm to obtain suitable coil geometries. For a frequency of 433 MHz, the simulations show an efficiency of -34.7 dB which we conclude is sufficient for the proposed monitoring system.

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  • 8.
    Nilsson, Joakim
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Department of Physics, Imperial College, London.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    High-temperature characterisation and analysis of leakage-current-compensated, low-power bandgap temperature sensors2017In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 93, no 1, p. 137-147Article in journal (Refereed)
    Abstract [en]

    This paper analyses leakage current compensation techniques for low-power, bandgap temperature sensors. Experiments are conducted for circuits that compensate for collector-substrate, collector-base, body-drain and source-body leakage currents in a Brokaw bandgap sensor. The sensors are characterised and their failure modes are analysed at temperatures from 60 to 230∘C">230 ∘ C 230∘C . It is found that the most appropriate compensation circuit depends on the accuracy requirements of the application and on whether a stable reference voltage is required by other parts of the circuit. Experiments show that the power consumption is dominated by leakage current at high temperatures. One type of sensor was seen to consume 260 nW at 60∘C">60 ∘ C 60∘C , 2.1μW">2.1μW 2.1μW at 200∘C">200 ∘ C 200∘C and 14μW">14μW 14μW at 230∘C">230 ∘ C 230∘C . This work is motivated by the need to accurately monitor the temperature of power semiconductors in order to predict emerging faults in power semiconductor modules, a task for which cheap, single-chip, low-power, high-temperature, wireless bandgap temperature sensors are appropriate.

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  • 9.
    Nilsson, Joakim
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Leakage Current Compensation for a 450 nW, High Temperature, Bandgap Temperature Sensor2015In: Proceedings of the 19th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2015, Piscataway, NJ: IEEE Communications Society, 2015, p. 343-347, article id 7208540Conference paper (Refereed)
    Abstract [en]

    The design of a 450 nW bandgap temperature sensor in the 0 to 175 °C range is presented. The design demonstrates a leakage current compensation technique that is useful for low-power designs where transistor performance is limited. The technique mitigates the effects of leakage in Brokaw bandgap references by limiting the amount of excess current that is entering the bases of the main bipolar pair due to leakage. Using this technique, Monte Carlo simulations show an improvement factor of 7.6 for the variation of the temperature sensitivity over the full temperature range. For the variation of the reference voltage, Monte Carlo simulations show an improvement factor of 2.3.Sensors built using this technique can be used to accurately monitor the temperature of power semiconductors since wireless temperature sensors become feasible with sufficiently low power consumption.

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    FULLTEXT01
  • 10.
    Nilsson, Joakim
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Load-Dependent Power Transfer Efficiency forOn-Chip CoilsManuscript (preprint) (Other academic)
    Abstract [en]

    This paper presents a theory for the power transfer efficiency to on-chip coils, with focus on load-dependence for low-power single-chip systems. The theory is verified with electromagnetic simulations modelled on a 350~nm process which in turn are verified by measurements on manufactured integrated circuits. The power transfer efficiency is evaluated by on-chip rectification of a 225~MHz signal transmitted by a spiral coil printed on a ceramic substrate at 10 mm of separation. Such an approach avoids the influence of off-chip parasitic elements such as bond-wires which would reduce the accuracy of the evaluation.It is found that there exists a lower limit for the load below which reducing the power consumption of on-chip circuits yield no increase in power consumption. The paper is focused on the analysis and verification of the theory behind this limit.We relate the results presented in this work to the application of wireless single-chip temperature monitoring of power semiconductors.

  • 11.
    Nilsson, Joakim
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Department of Physics, Imperial College, London, UK.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Load-dependet power transfer efficiency of on-chip coils2021In: Springer Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, Vol. 109, p. 611-624Article in journal (Refereed)
    Abstract [en]

    This paper presents a theory for the power transfer efficiency of printed circuit board coils to integrated circuit coils, with focus on load-dependence for low-power single-chip systems. The theory is verified with electromagnetic simulations modelled on a 350 nm CMOS process which in turn are verified by measurements on manufactured integrated circuits. The power transfer efficiency is evaluated by on-chip rectification of a 151 MHz signal transmitted by a spiral coil on a printed circuit board at 10 mm of separation to an on-chip coil. Such an approach avoids the influence of off-chip parasitic elements such as bond wires, which would reduce the accuracy of the evaluation.

    It is found that there is a lower limit for the load below which reducing the power consumption of on-chip circuits yield no increase in voltage generated at the load. For the examined process technology, this limit appears to lie around 56 kΩ. The paper is focused on the analysis and verification of the theory behind this limit.

    We relate the results presented in this work to the application of wireless single-chip temperature monitoring of power semiconductors and conclude that such a system would be compatible with this limit.

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  • 12.
    Nilsson, Joakim
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Imperial Coll, Dept Phys, London SW7 2AZ, England.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Maximal Q Factor for an On-Chip, Fuse-Based Trimmable Capacitor2019In: Electronics, E-ISSN 2079-9292, Vol. 8, no 1, article id 62Article in journal (Refereed)
    Abstract [en]

    This paper presents a circuit for realising a fuse-programmable capacitor on-chip. The trimming mechanism is implemented using integrated circuit fuses which can be blown in order to lower the resulting equivalent capacitance. However, for integrated circuits, the non-zero fuse resistance for active fuses and finite fuse resistance for blown fuses limit the Q factor of the resulting capacitor. In this work, we present a method on how to arrange the fuses in order to achieve maximal worst-case Q factor for the given circuit topology given the process parameters and requirements on capacitance. We also analyse and discuss the accuracy and limitations of the topology with regard to fuse resistance and parasitic elements such as bond pads.

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  • 13.
    Nilsson, Joakim
    et al.
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Borg, Johan
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Johansson, Jonny
    Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
    Single Chip Wireless Condition Monitoring of Power Semiconductor Modules2015In: Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC), 2015, Piscataway, NJ: IEEE Communications Society, 2015, article id 7364407Conference paper (Refereed)
    Abstract [en]

    A concept for doing accurate monitoring of temperature in power semiconductor modules is proposed. The concept involves glueing wireless single-chip temperature sensors with on-chip coils in direct contact with power semiconductor devices within their modules. Direct contact results in accurate temperature measurements while wireless technology such as RFID provides galvanic isolation from the power devices. An overview of the electromagnetic situation within wire bond power semiconductor modules is presented and a prototype chip with an on-chip coil has been manufactured as an initial attempt to investigate the feasibility of the concept. Measurements on said chip provides some insight in the challenges in on-chip coil designs. The feasibility of the concept is supported by earlier work that have demonstrated high power transfer efficiencies and a low power temperature sensor that is able to operate at high temperatures.

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    FULLTEXT01
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