The combination of Service Oriented Architectures (SOAs) and Complex Event Processing (CEP) is gaining momen- tum for event centric management and processing of informa- tion in complex distributed systems (e.g., business automation). Whereas systems for factory automation have traditionally been deployed using dedicated buses and proprietary (often scan based) protocols, a recent trend in process automation is towards adopting open internet based technologies and event based communication. This trend is driven by the increasing number and capabilities of devices used for monitoring and control, and the increased flexibility, maintainability and price/performance gains expected from IP (potentially SOA/CEP) enabled systems.In this paper we discuss the challenges involved to apply SOA and CEP to the field of factory automation. In particular, real- time aspects are highlighted, both w.r.t. to accurate time-stamping of physical events in a distributed system, as well as end-to-end timing including communication and CEP processing.We approach the challenges by an architecture combining state-of-the-art synchronisation mechanisms for wired and wire- less networks together with real-time communication and dis- tributed query processing based on the notion of time constrained reactions. We discuss the impact of synchronisation inaccuracies and delays introduced by processing and communication, and present a method for implementation of safe potential- and certain matches.

Service Oriented Architectures (SOAs) and Complex Event Processing (CEP) are established technologies in the area of business automation. In combination, SOA and CEP allow for event centric management and processing of information in complex distributed systems. Whereas systems for process monitoring and control traditionally have been deployed using dedicated buses and proprietary (often scan-based) protocols, a recent trend in process automation is towards adopting open Internet-based technologies. This trend is driven by the increasing number and capabilities of devices used for monitoring and control

Industrial process automation systems are adopting event based communication. Pushing control loops towards low- level devices implies a need for lightweight embedded devices that are able to recognize and to react to events. Atomic events however, such as a value read by an individual sensor exceeding certain value, do not separately suffice to capture scenarios where a reaction should occur to a sequence of low-level events matching certain pattern, rather than to a single atomic event. Therefore, it becomes desirable that resource-constrained low- level devices are equipped with some, possibly lightweight, form of event filtering and processing. In this paper we propose to implement a lightweight complex event processing using the concurrent reactive objects (CRO) model. A core feature of the CRO model is its s ability to react to atomic events. Between the reactions, which basically are function executions, the system remains idle, and thus does not occupy the CPU and is energy-efficient. Additionally, CRO models can be executed in an efficient and predictable manner onto resource constrained platforms and offers low-overhead real-time scheduling through exploiting underlying interrupt hardware according to given time constraints.

The introduction of Service Oriented Architectures for monitoring and control involves the deployment of SOA onto lightweight devices (e.g., embedded controllers for sensors and actuators). For the use of SOA in applications where timing and dependability are important, it becomes crucial that SOA event processing and service implementations are robust and time bound for a given platform. To this end, formalisms and tools aiding the design is instrumental. In this paper, we present a roadmap for a SOA based on components using the modeling and programming paradigm of Timber. Our vision is to present Timber based software components as services. By using current standards for service descriptions and eventing we will facilitate interoperability with legacy systems. We will develop a compiler tool suit allowing Timber based services to be deployable onto lightweight resource constrained platforms (e.g., sensors and actuators for industrial use). Our goal is to provide design time guarantees on e.g., robustness (safety and liveness), timing properties, and resource utilization for the complete embedded system comprising SOA event communication, event processing together with the service implementations.

Model and component based design is an established means for the development of large software systems, and is starting to get momentum in the realm of embedded software development. In case of safety critical (dependable systems) it is crucial that the underlying model and its realization captures the requirements on the timely behavior of the system, and that these requirements can be preserved and validated throughout the design process (from specification to actual code execution). To this end, we base the presented work on the notion of Concurrent Reactive Objects (CRO) and their abstraction into Reactive Components.In many cases, the execution platform puts firm resource limitations on available memory and speed of computations that must be taken into consideration for the validation of the system.In this paper, we focus on code synthesis from the model, and we show how specified timing requirements are preserved and translated into scheduling information. In particular, we present how ceiling levels for Stack Resources Policy (SRP) scheduling and analysis can be extracted from the model. Additionally, to support schedulability analysis, we detail algorithms that for a CRO model derives periods (minimum inter-arrival times) and offsets of tasks/jobs. Moreover, the design of a micro-kernel supporting cooperative hardware- and software-scheduling of CRO based systems under Deadline Monotonic SRP is presented.

Live heap space analyses have so far been concerned with the standard sequential programming model. However, that model is not very well suited for embedded real-time systems, where fragments of code execute concurrently and in orders determined by periodic and sporadic events. Schedulability analysis has shown that the programming model of real-time systems is not fundamentally in conflict with static predictability, but in contrast to accumulative properties like time, live heap space usage exhibits a very state-dependent behavior that renders direct application of schedulability analysis techniques unsuitable.

In this paper we propose an analysis of live heap space upper bounds for real-time systems based on an accurate prediction of task execution orders. The key component of our analysis is the construction of a non-deterministic finite state machine capturing all task executions that are legal under given timing assumptions. By adding heap usage information inferred for each sequential task, our analysis finds an upper bound on the inter-task heap demands as the solution to an integer linear programming problem. Values so obtained are suitable inputs to other analyses depending on the size of a system’s persistent state, such as running time prediction for a concurrent tracing garbage collector.

Regular types are a powerful tool for computing very precise descriptive types for logic programs. However, in the context of reallife, modular Prolog programs, the accurate results obtained by regular types often come at the price of efficiency. In this paper we propose a combination of techniques aimed at improving analysis efficiency in this context. As a first technique we allow optionally reducing the accuracy of inferred types by using only the types defined by the user or present in the libraries. We claim that, for the purpose of verifying type signatures given in the form of assertions the precision obtained using this approach is sufficient, and show that analysis times can be reduced significantly. Our second technique is aimed at dealing with situations where we would like to limit the amount of reanalysis performed, especially for library modules. Borrowing some ideas from polymorphic type systems, we show how to solve the problem by admitting parameters in type specifications. This allows us to compose new call patterns with some precomputed analysis info without losing any information. We argue that together these two techniques contribute to the practical and scalable analysis and verification of types in Prolog programs.

This paper proposes a diagnosis algorithm for locating a certain kind of errors in logic programs: variable binding errors that result in abstract symptoms during compile-time checking of assertions based on abstract interpretation. The diagnoser analyzes the graph generated by the abstract interpreter, which is a provably safe approximation of the program semantics. The proposed algorithm traverses this graph to find the point where the actual error originates (a reason of the symptom), leading to the point the error has been reported (the symptom). The procedure is fully automatic, not requiring any interaction with the user. A prototype diagnoser has been implemented and preliminary results are encouraging.