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A Benchmarking Pipeline to Evaluate Neural Network Acceleration Approaches on FPGA
Tartu Observatory, University of Tartu, Observatooriumi 1, Toravere, 61602 Tartu maakond, Estonia.
Tartu Observatory, University of Tartu, Observatooriumi 1, Toravere, 61602 Tartu maakond, Estonia.
Tartu Observatory, University of Tartu, Observatooriumi 1, Toravere, 61602 Tartu maakond, Estonia.
Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Space Technology.ORCID iD: 0000-0002-5681-5386
2024 (English)In: 31st IAA Symposium on Small Satellite Missions: Held at the 75th International Astronautical Congress (IAC 2024), International Astronautical Federation, IAF , 2024, Vol. 2, p. 692-701Conference paper, Published paper (Refereed)
Abstract [en]

As the complexity of spacecraft missions grows, so does the demand for sophisticated systems capable of efficient operation and extensive data processing. However, existing mission capabilities often face constraints stemming from limited bandwidth and onboard processing capacity, necessitating intricate ground station systems and command protocols. To address these challenges and enhance spacecraft autonomy, the integration of artificial intelligence, particularly neural networks, presents a promising solution. Despite their potential, current machine learning algorithms consume substantial power and memory resources, posing deployment challenges for space systems. This research focuses on understanding the relation of task complexity and possibilities to deploy the networks onboard spacecraft. Through the optimization of algorithms for System-on-Chip platforms and leveraging hardware acceleration, the aim is to enable broader usage of machine learning technologies while minimizing power consumption. A comparative analysis needs to be conducted by deploying various convolutional neural network (CNN) models onto various embedded systems, including those equipped with generic processors and FPGA-based hardware acceleration such as AMD Xilinx’s Vitis AI and Microchips Vectorblox and others. Throughput, task complexity, power consumption and efficiency metrics need to be evaluated to assess the efficacy of different deployment approaches. As this is a very extensive task it is important for efficiency and reproducibility to create an automatized pipeline which eases benchmarking the different approaches and compare many different parameters. The goal is to create a platform to modularly exchange approaches and devices in a reproducible way. This pipeline is introduced in this paper and will be made open-source available to allow the community to integrate further systems to be tested in the scope of this project. Ultimately, this study contributes to advancing the efficiency and applicability of artificial intelligence in space missions. Specifically, it investigates the performance of machine learning algorithms on FPGA platforms, which are instrumental for executing complex algorithms in space environments.

Place, publisher, year, edition, pages
International Astronautical Federation, IAF , 2024. Vol. 2, p. 692-701
National Category
Artificial Intelligence Other Electrical Engineering, Electronic Engineering, Information Engineering
Research subject
Onboard Space Systems
Identifiers
URN: urn:nbn:se:ltu:diva-111907DOI: 10.52202/078365-0080Scopus ID: 2-s2.0-85219197143OAI: oai:DiVA.org:ltu-111907DiVA, id: diva2:1943605
Conference
31st IAA Symposium on Small Satellite Missions at the 75th International Astronautical Congress, IAC 2024, Milan, Italy, October 14-18, 2024
Note

ISBN for host publication: 979-8-3313-1216-9

Available from: 2025-03-11 Created: 2025-03-11 Last updated: 2025-10-21Bibliographically approved

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Laufer, Rene

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