The open RISC-V instruction set architecture (ISA) defines a new era of domain-specific computer architectures by allowing the implementation of custom, application-specific instructions. In this paper, we propose a novel approach to exposing such instructions to the end user in the Rust programming language. The proposed approach discriminates between statically known and unknown values, and automatically emits the appropriate (e.g, immediate- or register to register-type) instruction without changes to the Rust toolchain. We validate the approach by implementing a Peripheral Access Crate (PAC) for the RISC-V Real-Time Hippomenes architecture. Hippomenes introduces CSR (Control and Status Register)-mapped peripherals allowing efficient peripheral access with reduced software overhead (single instruction read-write/set/clear, including 12-bit peripheral address and optional 5-bit immediate field). Our experiments confirm that all software abstraction layers introduced are completely eliminated at compile time. Moreover, for all cases where the LLVM compiler backend can deduce values to be statically known, immediate instruction variants are selected (thus improving performance and reducing register pressure in comparison to register instructions).
ISBN for host publication: 979-8-3315-4031-9;
Funder: ITEA 4 GenerIoT project; European Union (20366918);